I tried contacting the author to see if he would open source it but he's gone dark and doesn't seem to really exist on the Internet anymore. So I grabbed the source code and modernised it, added additional feature and it's what I've been using ever since. I haven't open sourced it out of respect for the original author however the software does not actually have any license that prevents it so I have been considering what the best approach might be (any ideas?).
If you're feeling brave, I've hacked up a way to make proper 4K scaling work, I only have a 60hz screen so it will need some modifications for 120hz but - https://github.com/sammcj/force-hidpi
Impressive, that's quite a feat. It is great that you found a workaround - it gives me hope that Apple will eventually fix this issue. I will hold out for a bit longer an wait for apple to get their act together.
I am still in disbelieve about the issue. I thought I have bought the most advanced notebook on this planet just to find out that it does not support external displays?
5k might be a different story, are you actually running it at 5120p with 2.0 scale? You can get that from running `system_profiler SPDisplaysDataType`, if you are running HiDPI with 5k that'd show something like Resolution: "10240 x 5760", UI Looks like "5120 x 2880"
system_profiler SPDisplaysDataType
Graphics/Displays:
Apple M4 Max:
Chipset Model: Apple M4 Max
Type: GPU
Bus: Built-In
Total Number of Cores: 40
Vendor: Apple (0x106b)
Metal Support: Metal 4
Displays:
LG UltraFine:
Resolution: 4096 x 2304
UI Looks like: 2048 x 1152 @ 60.00Hz
Main Display: Yes
Mirror: Off
Online: Yes
Rotation: Supported
Automatically Adjust Brightness: Yes
To be honest it feels crisp. But good to know maybe I need to upgrade more.
The 4 values in MaxSrcRectWidthForPipe are sub-pipes within each display controller, not separate display outputs. Every external display controller on the M5 Max has the same pattern: sub-pipe 0 = 6720, sub-pipes 1-3 = 7680. A single-stream 4K display only uses sub-pipe 0. Sub-pipes 1-3 are for multi-pipe configurations (8K displays use 2 sub-pipes, which is why an 8K EDID causes the DCP to assign PipeIDs=(0,2) with MaxPipes=2).
Your scaler clock theory could be right: the single-stream scaler path may genuinely have a lower throughput limit than the multi-pipe path.
Interestingly, the M2 Max uses a completely different IOMFBMaxSrcPixels structure. Instead of per-sub-pipe arrays, it has a flat MaxSrcRectWidth=7680 and MaxSrcRectTotal=33177600 (exactly 7680x4320) per controller. Every external display controller gets the full 7680 budget. Apple seems to have restructured the display controller architecture between M2 and M4/M5 to per-sub-pipe budgets, and the single-stream sub-pipe got a reduced allocation (6720 vs 7680) in the process. Whether that's a hardware change in the scaler or a firmware allocation policy is hard to say without Apple's documentation.
*Edit: Whoops! I was confusing refinedHN with modernHN (https://www.modernhn.com)
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