It may seem overly simplistic, but 2-port models for capacitors can be configured in series (as shown here) or in shunt (much more common for power distribution network applications). So, as basic as you might think this diagram is, it is entirely expected to be there so that we instantly know if the S-parameters are in series or shunt configuration - it would be more unusual if it were missing.
I came in here to recommend Lattice as well, at least for small glue-logic type applications. I've used their various MaxhXO lines extensively and really enjoy working with them.
Like many in this thread, I have a similar setup. I used to use I separate KVM, which did work but had a lot of cabling.
Eventually, I decided on just a simple USB SPDT switch that I designed [0], a USB hub, and manual input switching on the monitor. Even though it takes two actions instead of one, it's a simpler setup and has been quite reliable for years now.
Even though I never cheated, I never wanted my programs to get erased... I just created an image of the "memory erased" screen and showed that to the teachers.
The subheading to this article seems a little extreme: "To fill the talent gap, CS majors could be taught to design hardware, and the EE curriculum could be adapted or even shortened."
The article is more in the area of chip design and verification than PCB hardware, so I kinda understand where it's coming from.
Weird article, came to it hoping to see if I could train into a new job. But instead it went on and on about AI for almost the entire piece. Never learned what classes I might need to take or what the job prospects are.
I put together some of my thoughts on the latest generation of AI tools. Whether you love to use these tools, or actively avoid them, nearly everyone is most certainly intrigued by them. Personally, I'm super conflicted. I've seen some really awesome ways they have been a help, but I'm honestly a bit worried about the society-wide impacts they may have.
