This seems to be very odd. May be someone wanted to make access easy and fucked it up. Then they left it and defined it as feature.
The original feature is may be, that data access is byte wise, but as it is 32-bit CPU the instruction access is double-word wise. As it is also little endian someone may wanted to make the access easy.
Yeah, I've seen similar tricks on ARM microcontrollers that have 32-bit address spaces and tiny amounts of memory. e.g. https://spin.atomicobject.com/2013/02/08/bit-banding/ But the reverse ordering has me scratching my head.
I guess you could use it to support rudimentary multi-threading, with two different stacks growing in opposite directions...
It's weirder than that: within a word the bytes are in order, it appears that "top" and "bottom" of memory have been exchanged. It's as if one address bus is being fed through an inverter.
I don't think it's an inverter. It looks like a subtraction (which is even weirder). Here's the example they give:
0x3FFE_0000 accesses the least significant byte in the word accessed by 0x400B_FFFC.
0x3FFE_0001 accesses the second least significant byte in the word accessed by 0x400B_FFFC.
0x3FFE_0002 accesses the second most significant byte in the word accessed by 0x400B_FFFC.
0x3FFE_0003 accesses the most significant byte in the word accessed by 0x400B_FFFC.
0x3FFE_0004 accesses the least significant byte in the word accessed by 0x400B_FFF8.
0x3FFE_0005 accesses the second least significant byte in the word accessed by 0x400B_FFF8.
0x3FFE_0006 accesses the second most significant byte in the word accessed by 0x400B_FFF8.
0x3FFE_0007 accesses the most significant byte in the word accessed by 0x400B_FFF8.
……
0x3FFF_FFF8 accesses the least significant byte in the word accessed by 0x400A_0004.
0x3FFF_FFF9 accesses the second least significant byte in the word accessed by 0x400A_0004.
0x3FFF_FFFA accesses the second most significant byte in the word accessed by 0x400A_0004.
0x3FFF_FFFB accesses the most significant byte in the word accessed by 0x400A_0004.
0x3FFF_FFFC accesses the least significant byte in the word accessed by 0x400A_0000.
0x3FFF_FFFD accesses the second most significant byte in the word accessed by 0x400A_0000.
0x3FFF_FFFE accesses the second most significant byte in the word accessed by 0x400A_0000.
0x3FFF_FFFF accesses the most significant byte in the word accessed by 0x400A_0000.
The original feature is may be, that data access is byte wise, but as it is 32-bit CPU the instruction access is double-word wise. As it is also little endian someone may wanted to make the access easy.