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Ah, so it's not so much about adjacency (which would even benefit an implementation that insisted on loading bytes individually) but about the number of operations required to bucket-brigade those zeroes and ones into registerland when the cache issue is solved (which I'd have very much expected to be the case in the baseline of the comparison, just like other replies).

I was close to dismissing your reply as merely a nomenclature nitpick, but I think I have learned something interesting, thanks!



I definitely didn't use the correct language in my post above. But I think we've got the misunderstanding cleared up now.

I'll try to use the word "Load/store Unit" when talking about that part of the CPU from now on.




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