Dumb question, wouldn't node size impact the logic latency itself on some level? | Hacker News

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whaleofatw2022 28 days ago | parent | context | favorite | on: AI Chip Architectures

Dumb question, wouldn't node size impact the logic latency itself on some level?

skyberrys 28 days ago [–]

Yes smaller nodes give lower power operation with faster transistor switching speeds. You can also underpower a node to intentionally cause slower transistor switching speeds.

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